The harder you work,
           the luckier you seem to be.  

This project demonstrates a non-VonNeumann, sequential digital logic design for a binary coded decimal clock.

This project demonstrates using a SPICE circuit analysis program to evaluate a linear analog circuit.  The circuit is similar to an operational amplifier, but has much lower gain and is composed of discrete components.

This project uses Xilinx ISE, Verilog HDL, and Mentor Graphics ModelSim to design a digital clock that is  implemented on the Xilinx CoolRunner2 XC2C256 board.

An Analog circuit simulation with SPICE project

A Digital Electronic Design & Simulation with KSimulink project

A CPLD digital clock project (Verilog)

An FPGA Hardware project (Verilog)

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